FMC - DVI I/O

[anandkumarcr]

Hi,

I am using the Avnet DVI I/O FMC module from AVNET with xilinx ML605 board. I was referring to This Guide. I had doubts in understanding some of the stuff in Page 9 of the hardware guide of DVI I/O FMC.

It is stated that before the module is powered-up, the carrier must identify the FMC module. 

-> Is it referring to IPMI Identification ?

-> My understanding is that I need to implement an IIC Master inside the FPGA to communicate with the module for IPMI Identification. Once done I need to send a handshake or acknowledgement signal of some sort. Is my understanding correct ? If so how do I send a handshake to the FMC module ?

Could anybody please verify whether my understanding is correct ?

Thank you.

[AlbertaBeef]

Anand,

The IPMI Identification is an optionnal feature.

I used this in the IVK's EDK designs to verify that the expected FMC module was present.

I used this identification step before driving the outputs to the FMC module.

The FMC specification does state that a carrier should identify the hardware before powering it on,

this is not done in any of our reference designs.

I hope this answers your question.

Regards,

Mario Bergeron.

[anandkumarcr]

Hi Mario,

Thanks for the confirmation. So I need to connect the board and check for PRSTN_M2C_L signal to go low and configure the DVI Transmitter and receivers (TFP403 and TFP410) and the Clock Synthesizer CDCE913 to get the video up and running through the board right ?

[AlbertaBeef]

Yes, that is correct.

If you are doing a pass-through, you will not need the clock synthesizer, as the TFP403 will provide the pixel clock.

There is an HDL (VHDL and Verilog) passthrough example design on the S6-IVK's DRC page:

   www.em.avnet.com/spartan6video

Which FMC carrier are you using for your development ?

Mario.

[anandkumarcr]

Hi mario,

I am using the xilinx virtex ML605 development board and the avnet DVI I/O FMC connected to the HPC connector of the board.

[AlbertaBeef]

Anand,

You can also take a look at the following app notes from Xilinx,

which make us of the ML605 + FMC-DVI hardware:

XAPP521 - Bridging Xilinx Streaming Video Interface with the AXI4-Stream Protocol

Regards,

Mario.

[anandkumarcr]

Hi mario,

Thanks for the information