It is possible the problem isn't with your AXI system created by BSB. Becuase the LX16 board is also powered by a battery, some functions of the board are disabled by default. There is a manual edit you need to make to the MHS file to enable power to the Ethernet PHY. Add this line to the PORTS section near the top of the system.mhs file:
PORT FPGA_LS3_CTL = net_vcc, DIR = O
And add this line to the data/system.ucf file:
NET FPGA_LS3_CTL LOC = N14 | IOSTANDARD = LVCMOS33; //turn on Ethernet PHY
Both of these edits should be documented in the tutorial that accompanies the PLB design created with the EDK 12.3 tools. Though the system interconnect is different (AXI vs PLB), the function of the design is the same. The software is also different in the PLB and AXI versions, but I suspect you have already figured that out. 
Cheers,
Tom
