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Founding Member
hockeyman
Posts: 26
Registered: 04-22-2009
0

Why hasn't an Ethernet 10/100 PHY been implemented inside the FPGA?

This question has been asked at several locations by some customers interested in 10/100 connections.

 

The answer to this can be ascertained by examining the function of the PHY device, at least in terms of attaching a 10/100 PHY to CAT-5 cabling.  The primary purpose of the PHY is to convert the digital signals inside the FPGA to analog signals on the wire.   Everything in the FPGA is digital - there is no way to generate analog signals within the fabric.  Even ignoring the magnetics that exist between the external connections and the PHY, this digital to analog requirement precludes the use of soft IP for a 10/100 PHY device.

 

If you are able to use GbE, then we have a different story.   The ll_temac can use the SGMII standard to connect to an SFP module, which is an all digital solution.  Therefore, we can use the GTP's that have, for the first time,  been built into Spartan-6 "T" devices to implement the PHY and we don't need an external component.

 

 

New Member
bildengineerbb
Posts: 4
Registered: 11-03-2011
0

Re: Why hasn't an Ethernet 10/100 PHY been implemented inside the FPGA?

Is there any detailed application available, showing how to do this with the AVNET S6LXT board?

 

Avnet Employee
narrucmot
Posts: 31
Registered: 04-17-2009
0

Re: Why hasn't an Ethernet 10/100 PHY been implemented inside the FPGA?

There are networking example designs on the Avnet DRC for the LX150T board (http://www.em.avnet.com/spartan6lx150t-dev).  Navigate to this webpage and click on "Support Files and Downloads" and look for any of the Networking Performance or LwIP Applications designs.